The present invention relates to packaging of semiconductor devices in general and more specifically to a method of packaging a semiconductor device using a lead reinforced plastic tablet.
Small packages having high pin counts are in demand. There is pressure on the IC packing industry to provide ways to interconnect smaller circuits with more Inputs and Outputs (IOs). That is, very high density interconnects at die level must be translated to the much coarser pitch of printed circuit boards. Lead frames and interconnecting substrates are used to provide this IO pitch translation function. For example, a ball grid array (BGA) package uses an interposer substrate to convert the peripheral bonding sites of the die to an array configuration. Such interposers generally are made from ceramic materials having vias formed by drilling, punching, etching or laser that are metallized or filled with conductive metal. The processes for making interposers are difficult and expensive. Thus, a need exists for a method of making a high density package with fine pitch and high IO count interconnections at low cost.
Accordingly, it is an object of the present invention to provide a method of fabricating a low cost, high IO semiconductor package.